A vlsi very large scale integration architecture is also proposed to implement the improved motion estimation algorithm . experimental results show that this algorithm - hardware co - design gives better tradeoff of gate - count and throughput than the existing ones and is a proper solution for the variable block size motion estimation in avs 考虑到avs主要面向图像尺寸较大的高清数字电视压缩,这种高复杂度的运算已经超过了现有通用处理器的运算能力,因此有必要设计专门的快速算法和与这种算法相匹配的硬件加速器。